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Pull requests: SI-RISCV/e200_opensource

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Pull requests list

Verilator testbench for ISA tests
#8 opened Aug 7, 2018 by brabect1 Loading… updated Aug 7, 2018
Fix combination loop in icb_claim_irq and icb_complete_irq.
#28 opened Jul 14, 2019 by xxqfhj Loading… updated Jul 14, 2019
Fix typo in decoder
#29 opened Aug 31, 2019 by howard0su Loading… updated Aug 31, 2019
Define CSR Address width
#30 opened Aug 31, 2019 by howard0su Loading… updated Aug 31, 2019
vsim/Makefile: fix build command in some case
#40 opened Jan 2, 2020 by vowstar Loading… updated Jan 2, 2020
Fix conditional operator in e203_exu_alu_muldiv
#47 opened Aug 26, 2020 by sylwpro Loading… updated Aug 26, 2020
ProTip! What’s not been updated in a month: updated:<2024-05-15.